Aliathon E1/T1 Jitter Attenuator Core
General Description
Aliathon Multichannel E1/T1 Jitter Attenuator core.
The Aliathon Multi-Channel
E1/T1 Jitter Attenuator Core provides a very flexible,
resource efficient FPGA based Core for reducing Jitter in E1 or T1 applications.
The
core:
• Provides Jitter Attenuation
for up to 96-channels
• Supports E1 or T1 Rate
• Designed to provide G.723 & G.724 Output Jitter compliance
• Supports variable input data widths up to 8-bits
• Is fully synchronous and runs at very high clock speeds.
The Aliathon E1/T1 Jitter Attenuator Core has already been tested in Hardware and meets G.723 and G.724 Jitter requirements.
Logic Utilization in Spartan 3 is:
- Number of Slice Flip Flops: 2,475 out of 26,624 9%
- Number of 4 input LUTs: 2,466 out of 26,624 9%
- BlockRAMs: 0
That equates to only 26 FFs/LUTs per channel!
aliathon.com
to register your interest or request a more detailed datasheet