Aliathon's OTU-1 Framer:

Generates the OTU1 frame structure and inserts framing overhead.
Scrambles the OTU frame, inserts OTUk Overhead, and calculates Section Monitoring BIP.
Inserts ODUk Overhead, and calculates Path Monitoring BIP.
Inserts synchronous payload mappings (eg: ATM, GFP), and asynchronous SONET/SDH mappings
(accommodating positive/negative stuffing).
Provides a contiguous 16 bit-wide payload output.
Interfaces to Aliathon’s OTU1 encoder core for efficient, low-latency G.709 FEC.

Aliathon's OTU-1 Deframer:

Detects and aligns to the OTU framing pattern.
Performs frame synchronisation for OTU1.
Descrambles the OTU frame, extracts OTUk Overhead, and detects Section Monitoring BIP errors.
Extracts ODUk Overhead, and detects Path Monitoring BIP errors.
Extracts synchronous payload mappings (eg: ATM, GFP), and asynchronous SONET/SDH
mappings (accommodating positive/negative stuffing).
Provides a contiguous 16 bit-wide payload output.
Interfaces to Aliathon’s OTU1 decoder core for efficient, low-latency G.709 FEC.

Aliathon's OTU-1 FEC Core:

Is fully compatible with other supporting Aliathon Cores.
Implements RS Decoding using Berlekamp-Massey algorithm for low latency.
Implements G.709 RS (255,239) OTU-1 Reed Solomon Encoding/Decoding.
Decoder counts all corrected bits, symbols and indicates uncorrectable Code Words.
Is fully synchronous and runs at very high clock speeds.
Is available for Altera and Xilinx FPGAs (hardware tested).

Aliathon's C-NIC™ Card has performed OTU-1 tests successfully.