Aliathon Segmentation And Reassembly AAL5

General Description

Aliathon is currently developing an ITU I.363.5 complaint core. It will support up to 64K VCs, handle full STM16/OC48 bandwidth, different memory interfaces (DDR2, QDR2...), ageing, alarms in a per PDU basis(CRC, Length Mismatches, Short/Long PDUs...).

It can be connected straight to Aliathon's ATM Core (multichannel or single channel for concatenated payloads).

Email infoaliathon.com to register your interest...