What we do

SONET/SDH

Snr. FPGA Design Engineer

What we do

Here at Aliathon we’ve created a culture that rewards fairly and challenges our people to be the best they can be.

If you are the sort of individual who thrives in a supportive and collaborative environment, is a self starter and would like to work in a place where opinions are valued then we may be the company for you.

We offer competitive compensation packages, flexible working hours and the opportunity to travel on company business.

We current have the following position open within our organization. Click on the link to read more...

What we do

Corporate

Press Releases

2011-09-14 Vitesse (pdf)
2011-03-03 Commprove (pdf)
2011-06-06 Mentor Graphics (pdf)

Product Briefs

100G OTN (pdf)
- 100G Transponder (pdf)
- 100G Muxponder (pdf)
- 100G Regenerator/Repeater (pdf)
40G OTN (pdf)

OTN Framer (pdf)
ODU Mux (contact us for product brief)
GFP-F Framer (pdf)
GFP-T CODEC (pdf)
SONET/SDH Framer (pdf)
VT/TU Mapper (pdf)
E1/T1 Mapper/Framer (pdf)
E3/T3 Mapper/Framer (contact us for product brief)
E1/T1 LIU/Framer (pdf)
E3/T3 LIU/Framer (contact us for product brief)
POS Framer (pdf)
ATM Framer (pdf)
HDLC Framer (pdf)
Ethernet MAC (contact us for product brief)

Application Notes

AN01 (AnyPort OTN) (pdf)
AN02 (AnyPort SONETSDH) (pdf)

What we do

Overview

Aliathon’s Packet/Cell products integrate seamlessly with our TDM products to form legacy and next-generation packet transport solutions.

The Cores support multiple paths and are available in channelized and non-channelized variants. This fine-grained flexibility supports a wide range of mappings to carry packets over any TDM based network.

Please click on any of the products below for more information.

POS Framer

Supports OC3/STM1 through to OC192/STM192.
Designed to process concatenated SONET/SDH payloads.
Inserts and detects CRC-16 and CRC-32.

ATM Framer

Conforms to ITU I.432.1.
Processes data for multiple independent TDM ATM streams.
Configurable IDLE and Unassigned Cell insertion, detection and deletion.
Optional HEC insertion; HEC error detection and correction.

HDLC Framer

Multi-channel HDLC support (>8k channels)
Supports bit-synchronous and byte-synchronous HDLC.
Configuration may be applied to each stream independently, and changed dynamically.
Full Overhead and Defect processing per channel

GFP-F (Framer)

Compliant with ITU-T G.7041 specification.
Generates/Synchronises to GFP data stream including IDLE frames.
Provides GFP scrambling/descrambling.
Full Overhead and Defect processing.

Ethernet MAC, contact us for product brief

Tri-rate (10/100/1000) & 10Gb Ethernet support.
Compliant to IEEE-1588.
CRC-32 checking & generation.
Programmable frame length to support proprietary and standard frame lengths.
Network statistics.

What we do

Overview

Aliathon’s PDH products support popular legacy PDH line rates, such as E1,T1, E3 and DS3.

The cores process multiple asynchronous paths and are available in channelized and non-channelized payload variants. This flexibility allows support for all types of PDH applications, such as Line Interfaces, Add/Drop Muxes and Circuit Emulation interfaces.

Please click on any of the products below for more info on our offering.

E1/T1 LIU/Framer

Conforms to ITU G.704/ANSI T1.403.
Performs frame synchronization and generation for T1, J1 and E1 PDH signals.
Serial clk+data line interface support for connecting to standard E1/T1 LIUs.
Jitter attenuation for up to 504/672 E1/T1 channels (2xOC12/STM4 links).
Designed to provide G.832 and G.824 Output Jitter Compliance, for 2.048 kHz +/-50 ppm (E1), 1.544 kHz +/-32 ppm (T1).

E3/T3 LIU/Framer, contact us for product brief

Conforms to ITU G.704/ANSI T1.403.
Generates and performs frame synchronization for T3, J3 and E3 PDH signals.
Supports up to 24 serial clk+data E3/T3 line interfaces.
M13 (DS3->DS2-DS1) and E3->E2->E1 support.

What we do

Market Dynamics…

Global downturn slowing down spending on test & measurement capital equipment
Cost constrained test equipment tenders from the communications market makers driving consolidation among the T&M players and forcing acceptance of lower price points.
Platforms proposed against these tenders need to offer long term ROI through rich feature set and wide market appeal.

The Aliathon Advantage…

Aliathon solutions provide maximum design flexibility through multi-standard / line-rate and multi-protocol support
Our multi-channel & deeply channelized solutions make the most efficient use of FPGA real-estate targeting the Altera and Xilinx families.
Our solutions can be customized to allow the most intricate manipulation of the data bits & bytes as they flow through the FPGA system.
- The careful design of our IP building blocks allows extremely fine-grained control of the data stream to meet your customers unique test requirements. We help you to shake your customers equipment hard!

Our Products

SONET/SDH

What we do

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What we do

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What we do

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What we do

Overview

Aliathon’s SONET/SDH products enable high bandwidth, deeply channelized solutions that support all SONET/SDH line rates and mapping paths, including full Higher Order and Lower Order Path Processing and PDH Tributary mapping and framing.

The cores support multiple asynchronous line interfaces, and are available in channelized and non-channelized variants. Fine-grained flexibility allows support for all types of client signal, from traditional TDM and PDH to ATM, GFP and POS interfaces.

Read our SONET/SDH apps note or click on any of the products below for more information.

SONET/SDH Framer

Support for OC3/STM1, OC12/STM4, OC48/STM16, OC192/STM64 and OC768/STM256.
Single & multiple line interface support.
Conforms to G.707, G.806, G.783 and T1.105.
Processes all STS/AU pointers and Higher Order paths.
Full Overhead and Defect processing for all line interfaces and STS/VC paths.

VT/TU Mapper

Conforms to ITU G.707/ANSI T1.105.
Maps/Demaps multiple Lower Order VT/TU paths.
All permutations of mapping path and VT/TU type supported.
Generates/Processes all VT/TU pointers.
Full Lower Order Path Overhead processing.

E1/T1 Mapper/Framer

Framing and deframing for up to 1008/1344 E1/T1 channels (enough for a full OC48/STM16).
Asyncronous and syncronous TU payload mapping/demapping.
Conforms to ITU G.704/ANSI T1.403.
Frame generation and synchronization for T1, J1 and E1 PDH signals.
Full Overhead and Defect processing per channel.
Channel frame formats may be configured dynamically and independently, and asyncronous channel timing is supported.

E3/T3 Mapper/Framer, contact us for product brief

Performs frame synchronization and generation for T3, J3 and E3 PDH signals.
Asyncronous and syncronous STS1/VC3 payload mapping/demapping.
Conforms to ITU G.704/ANSI T1.403.
Core is capable of framing and deframing up to 24 channels (enough for a full 2 x OC12/STM4).
Full Overhead and Defect processing per channel.
Channel frame formats may be configured dynamically and independently, and asyncronous channel timing is supprted.

POS Framer

Supports OC3/STM1 through to OC192/STM64.
Designed to process concatenated SONET/SDH payloads.
Support for CRC-16 and CRC-32.

ATM Framer

Conforms to ITU I.432.1.
Processes data for multiple independent TDM ATM streams.
Configurable IDLE and Unassigned Cell insertion, detection and deletion.
Optional HEC insertion; HEC error detection and correction.

HDLC Framer

Multi-channel HDLC support (>8k channels).
Supports bit-synchronous and byte-synchronous HDLC.
Configuration may be applied to each stream independently, and changed dynamically.
Full Overhead and Defect processing per channel.

What we do

Altera Corporation (NASDAQ: ALTR) is the pioneer of programmable logic solutions, enabling system and semiconductor companies to rapidly and cost effectively innovate, differentiate, and win in their markets. Altera offers FPGAs, CPLDs, and ASICs in combination with software tools, intellectual property, and customer support to provide high-value programmable solutions to over 12,000 customers worldwide. Altera was founded in 1983 and has annual revenues in 2009 of US$1.20 billion. Altera is headquartered in San Jose, California, and employs approximately 2,600 people in 19 countries.

For more information, visit www.altera.com

Xilinx is the world’s leading provider of programmable platforms. Founded in 1984 and headquartered in San Jose, California, Xilinx invented the Field Programmable Gate Array (FPGA) and fulfills more than half of the demand for these devices today. Xilinx programmable logic provides revolutionary alternative to custom logic chips that require weeks or months of design time as a "fabless" semiconductor company.

Mentor Graphics® is a leader in electronic design automation. We enable companies to develop better electronic products faster and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex worlds of board and chip design. Precise-IP is a Precision Synthesis tool that generates vendor-independent HDL for commonly used IP building blocks. With an ever-increasing library, the easy-to-use wizard guides users to create widely used IP cores such as memories and arithmetic functions for easy re-use. These cores are optimized to provide the best quality of results across FPGA families

What we do

Market Dynamics…

Next generation military communication networks requiring carrier grade reliability. The bespoke nature of these networks and the information being carried makes it difficult to find off-the-shelf solutions.
Fixed-function silicon suppliers focused on short lifecycle commercial applications leading to obsolescence issues for long term military contracts.

The Aliathon Advantage…

Aliathon have a long history of supporting government agencies and military contractors in the development of bespoke solutions to assist in the framing, mapping, routing, collecting, processing and analysing of communications data.
Our ability to tailor the feature-set and connectivity of our solutions means we can help you carry any information over any medium that your network requires.
Our speciality is dealing with highly channelized data streams, making us an idea partner to help you achieve deep frame/ packet inspection

Our Products

SONET/SDH

What we do

Market Dynamics…

Existing analysis & assurance equipment being rendered obsolete as network speeds outstrip their capability.
Dramatic shift (voice->data) in how users are making use of the available network bandwidth forcing operators to test new and innovative revenue models. Models that rely upon deep inspection & high quality information capture & analysis.
Passive cyber-security & content security gateways need to deliver traffic analysis & content forensics hardware at wire-speed (10Gb+).

The Aliathon Advantage…

We help government and commercial clients reveal intelligence, maintain security and strengthen resilience in today's complex networks.
Aliathon's Network Analytics solutions offer multi-channel, scalable OTN, SONET/SDH and PDH interfaces to facilitate deep payload & packet inspection capabilities in both legacy TDM and next generation networks.
Our solutions are built from the ground up with the ability to peek/poke in to any part of the frame/ packet captured.
We deliver the custom feature set required to differentiate your products from your competition and create your own “Universal Network Probe”. Flexibility that is not readily available from off-the-shelf communications ASSPs.

Our Products

SONET/SDH

What we do

Our Technology Pedigree….

Founded by a core team of telecommunications systems specialists, Aliathon, from day one, have been delivering single chip FPGA solutions to meet our clients unique needs.

Our engineering team have a long association with FPGA technology and have become expert in the art of making best use of all commercially available silicon.

With a combined total of 60+ years experience delivering complex FPGA based systems you can use our team as extension of your own, allowing you to concentrate on your core technology competencies.

Our technology advantage….

With a significant background in software design, our team delivers tightly integrated VHDL based designs that take advantage of the most complex features of the language.

Our deep FPGA architectural knowledge results in small, efficient code, balanced designs, with no timing closure issues. This also means minimal VHDL code footprint which is directly related to quick compile times and repeatable results.

What we do

ASSPs (Application Specific Standard Products)

According to Wikipedia an ASSP is a product designed to appeal to a mass market. But what happens if the clients in that market want something a little different? What happens if standards change and evolve?

These are only 2 of the many issues associated with ASSPs; technology whose features and benefits are often best-guess based on old data.

Have you considered using ASSP technology, and if you have, do any of these issues sound familiar?

ASSP Issues

The chip has excess features that I just don't need.
- I'm forced to pay for functionality that I don't want.
The chip lacks the features I really need.
- If I choose this device my products look the same as everyone else's.
The chip consumes a significant % of my card’s power budget.
- It requires companion devices to do anything useful.

Start thinking differently……..

What we do

Steve McDonald

Steve founded Aliathon in April 2001 with Jed Martens and is Aliathon’s resident expert in Forward Error Correction as it relates to the Optical Transport Network.

Prior to founding Aliathon, Steve spent 3 years employed by Agilent Technologies in South Queensferry, Scotland, working in their Error Rate test group as an FPGA architect. During this time Steve designed FPGA systems that processed payloads up to and including OTU3 rates.

Before joining Agilent Technologies, Steve had a distinguished career in the high technology sector in Scotland, holding senior management positions with companies in the Security, Industrial and ePOS market places.

Jed Martens

Jed founded Aliathon in April 2001 with Steve McDonald and is Aliathon’s resident expert in the areas of channelized and unchannelized SONET/SDH and PDH systems.

Prior to founding Aliathon, Jed spent 2 years employed by Agilent Technologies in South Queensferry, Scotland, working in their channelized network analytics product group as an FPGA architect.

Jed is a native New Zealander, where he graduated with a First Class Honours Degree in Computing & Mathematical Sciences. He also completed post-graduate research in the area of Passive Network Monitoring, as well as lecturing in Telecommunications Studies.

Ulises Hernandez

Ulises joined Aliathon in August 2003 as a Senior Design Engineer, since then he has been involved in the development of many successful FPGA based solutions for the telecommunications market working closely with many of our Tier 1/2/3 customers. Over these years he has acquired a very broad range of skills, both generic and specialist, in communication protocols, standards and encryption including OTN, SDH, SONET, PDH, ATM, AAL2/5, HDLC, GFP, POS, FEC and Ethernet.

Prior to joining Aliathon, Ulises worked at Hewlett-Packard/Agilent Technologies. Starting in 2000 as a research and development engineer, he was involved in developing the FPGA architecture of 155Mbps-10Gbps data communications test equipment.
Ulises was born in Logroño, Spain, in 1975 and holds a Master of Science degree with Honours in Electronics Engineering from University of Zaragoza. He also completed his Master Thesis in Zaragoza developing an state of the art FPGA based codec in 1999.

Alan McDade

Alan joined Aliathon in May 2010 having spent 15 years in the high tech semiconductor arena. He has responsibility for sales / new business development, marketing and operations.

Prior to joining Aliathon, Alan spent 10 years in the Altera Corporation European sales team. In this time, Alan served the company as a Snr. Field Applications Engineer (FAE) and most recently as FAE Manager for Northern Europe.
In this managerial position Alan lead his team to deliver year on year revenue and design commit growth for the company, outstripping regional targets and the industries compound annual growth predictions (CAGR) for FPGA technology. He achieved this by delivering compelling & innovative solutions as well as a high quality of service to Altera's target customers which included some of the worlds largest telecommunications companies.

Mike MacGillis

Mike MacGillis joined Aliathon in July 2011 as an FPGA Design Engineer.

Prior to joining Aliathon, Mike worked as an ASIC/FPGA and Embedded software design engineer with a number of electronics companies in England and Scotland including Cadence Design Systems, ARC Cores, STMicroelectronics and Aircraft Medical Ltd. Mike is a Canadian who holds an Electrical Engineering Degree. He is currently working towards an MSc in Advanced Microelectronics.

What we do

Overview

At Aliathon we understand that the demands of complex projects don’t just end at the delivery stage. Factors such as bug fixes, changing customer requirements , unforeseen market trends and disruptive technology from your competitors can continue to consume bandwidth within your engineering teams. Today’s climate of cost control often means stretching resources across existing projects and important new developments.

Aliathon’s support contracts are designed to help you deal with this problem. We help you to quickly meet the evolving and dynamic needs of existing products already in the market place, freeing up your precious engineering resource to work on next generation applications.

We have developed a range of support packages that provide you with a continuation of our professional and timely assistance, allowing you to control costs in the latter stages of your project.

These contracts can be activated after the initial 12 months of the engagement and guarantee a smooth continuation of the high quality support you are receiving from our engineering team.

Support Components

Basic support: Access to collateral and FAQs via secure web log-in at www.aliathon.com.
Priority telephone & email support: Telephone and e-mail support for error correction during hours of business operation (Mon-Fri 9am-5pm). E-mail support outside of these times may also be possible.
Automatic Updates: Upgrades and enhancements made to the IP cores (standards updates, additional features, bug fixes etc).
Cost: A fixed percentage of the year 1 outlay by the client with Aliathon.
Support Scope: A variable cost/timescale option at the clients discretion. 6, 12 and 24 months available tailored to your individual project requirements.
Additional Benefits:
- Telecom system consultation (utilizing our years of experience in this domain).
- Direct access to core designers.
- Design integration support / consultation.
- Free of charge porting to other FPGA product families & other FPGA vendors.
- On site support / training.

What we do

Cumbernauld United 2002's
Team Sponsor 2012

Carnegie Cyclones
Club Sponsor 2012

What we do

Our business model is designed to support your project from early concept all the way through to production and beyond (including in-field upgrades).

We offer a commercially compelling alternative to fixed-function ASSPs as well as other IP providers.

We give you cost, power and real-estate savings while at the same time delivering the flexibility and reliability that your products need.

We are expert at delivering the perfect mix of these features for your current and future needs. Click here to contact us and discuss your project requirements...

What we do

Market Dynamics…

Slow recovery from world wide economic downturn.
- Recovery driven by next generation wireless network build out and governmental stimulus packages boosting spending in communications infrastructure.

Dramatic rise in popularity of smart-phone technology and video content sharing driving almost exponential growth in user bandwidth demands.
- Fueling growth in start up broadband services providers riding this consumer spending wave.
- Triple play at the cell site forcing entire network to evolve rapidly and offer fine grained, dynamic bandwidth solutions to the user.

Communications equipment providers faced with the challenge of providing cost effective and highly scalable equipment while at the same time adhering to the network operators requirements for low cost and sustainable solutions.

Operators demanding that equipment providers deliver integrated solutions to reduce the number of high cost / high maintenance nodes in the converged telecom/datacom "cloud" network.

The Aliathon Advantage…

As off-the-shelf ASSP providers obsolete “old” technology and take huge risks in taping out next generation, "best guess" silicon, we continue to offer risk-free re-programmable solutions that scale in synergy with your individual needs.
Aliathon's framing and mapping solutions are designed to solve the coarse and fine grained granularity requirements of both TDM and packet networks.
Our ability to offer design and interface flexibility in the lowest cost FPGA fabrics allows you to get (pay for) exactly the feature set you want and differentiate yourself from the competition.

Our Products

SONET/SDH

What we do

Aliathon’s clients range from global telecommunications market makers to niche and bespoke communication solution providers.

Although the majority of Aliathon’s clients remain anonymous via NDA’s, we are able to show a small selection through more specific cooperative marketing agreements.

Click on the individual logo's below to view our clients web sites.

Empirix is a market leader of service quality assurance solutions for comprehensive customer experience management and end-to-end communication analysis of mobile broadband and IP-based communications systems. The company offers a complete suite of products and services designed to address the quality and interoperability challenges posed by the increased use of mobile broadband, LTE, converged voice and unified communications in both IT and Telecom Environments. The world's largest communication service providers and enterprises depend on Empirix's proactive and predictive correlation solutions to assure the quality of their business-critical communication networks, resulting in greatly improved customer loyalty. Empirix is privately held and headquartered in Bedford, MA.

CommProve is focused on creating real customer value for mobile operators with advanced solutions for real-time monitoring of 2G, 3G, and 4G wireless networks. With CommProve Complete™, we offer the industry’s only combined Business Performance Optimization and trouble-shooting/trouble-resolution platform aimed at improving wireless telecom operator’s profit and cash flow. Typical application contexts are Roaming Revenue Assurance, Interconnect Traffic Management, RAN Congestion Steering and Policy Control, Mobile Broadband Traffic Management, Mobile Broadband Customer Analytics, and Customer Experience Management.

Founded in 1996, CommProve is a privately held company with headquarters in Ireland and offices in the UK, Italy, Brazil, Dubai and USA.

Transmode is a leading provider of optical networking solutions for transport of data, voice and video traffic, based on CWDM and DWDM technology (Coarse/Dense Wavelength Division Multiplexing).
Transmode's unique Intelligent WDM (iWDM™) approach has lead to widespread deployment of over 10000 systems in a customer base consisting of more than 250 fixed and mobile network operators, service providers, large enterprises and public institutions across Europe, the Americas and Asia.

Endace are world leaders in network traffic capture and analysis, focusing on high speed and ultra high speed networks. You’ll find our technology all over the world monitoring, measuring and protecting some of the largest and most complex networks known to man. Over the last ten years we have developed solutions for all standard LAN/WAN interfaces right up to 40Gb/s.

iSLI sits at the critical interface between the academic and commercial engineering worlds. The Institute is focused on knowledge transfer in enabling technologies, our vision being to increase the value and extent of company engagements in high level R&D. We strive directly to bridge the research exploitation gap, encompassing Technology Readiness Levels (TRLs) 3 to 6, by engaging both industry and academia individually and in common projects. The enabling technology, on which we focus, is applied across a very wide range of end applications.

Optos is an innovative retinal imaging company with a vision to be recognised as the leading provider of retinal diagnostics.
Optos designs, develops, manufactures and markets retinal imaging devices that create optomap images. The optomap is the only image that provides an ultra-widefield, 82% view of the retina . A simple optomap scan is an important tool for the screening, early detection and diagnosis of eye problems, such as retinal detachment, glaucoma, cataracts, retinal holes/retinal tears and age-related macular degeneration. It can also indicate evidence of non-eye diseases, such as diabetes, hypertension and certain cancers. Many of these conditions can be seen in the periphery of the retina as well as in the central pole which is why widefield imaging is so important. Optos believes that its technology provides an unequalled combination of widefield retinal imaging, speed and convenience for both the practitioner and patient.

What we do

Overview

Aliathon’s OTN solutions support all line rates, ODU containers and mapping schemes. Their fine-grained flexibility allows support for all types of clients from traditional TDM to 8B10B streams and packet interfaces (see ODU0 / ODUflex). We support single and multi-channel options, spanning client rates from 1Gb -> 100Gbps with OTN line rates from OTU1 -> OTU4.

To learn more about these solutions please click on one of the links below;

OTN apps note (general overview of our OTN capabilities).
100G OTN (product brief outlining our 100G solutions).
40G OTN (product brief outlining our 40G solutions).

100G

40G

40G OTN Transponder, contact us for product brief.
40G OTN Muxponder, contact us for product brief.

10G

10G OTN Transponder, contact us for product brief.
10G OTN Muxponder, contact us for product brief

Alternatively click on one of our product briefs below to learn about the individual building blocks used in the designs;

OTN Framer

Supports OTU1-OTU4 line rates.
Conforms to G.709.
G.709 FEC (GFEC) and optional EFEC support.
Processes OTUk, ODUk and OPUk overhead.
Supports synchronous (ATM, GFP) and asynchronous (SONET/SDH) payload mapping (accommodating positive/negative stuffing).

Forward Error Correction (FEC)

Supports OTU1-OTU4 line rates.
Conforms to G.709 (GFEC), G.975.1 (EFEC) and proprietary schemes.
OH: 7% - 20%+.
NECG: 6.3db - 9.35db (7% OH).

ODU Mux, contact us for product brief

Supports G.708 Muxing of client ODU0/1/2/3 signals into ODU1/2/3/4.
Full OTN overhead processing for intermediate stages.
1 and 2 stage mux/demux functionality.

GMP (Generic Mapping Procedure), contact us for product brief

Conforms to G.709.
Applies sigma-delta data stuffing / distribution as per the ITU-T standard.
Applicable for mapping transcoded 1GbE to ODU0, ODUflex in to higher order OPUk and all clients in to ODU4.

GFP-F (Framer)

Compliant with ITU-T G.7041 specification.
Generates/Synchronizes to GFP data stream including IDLE frames.
Provides GFP scrambling/descrambling.
Full Overhead and Defect processing.

GFP-T (Transparent)

Compliant with ITU-T G.7041 specification.
Encodes input blocks into 67 byte GFP-T blocks as per G.7041.
Extracts 64 byte 8B/10B blocks of data from GFP-T frames.

What we do

At Aliathon we strongly believe in the benefits of partnerships and have taken steps to ensure we offer our customers a solid, reliable and robust service in this regard.
We achieve this in two distinct ways;

FPGA & EDA Alliances
We maintain close working relationships with the major FPGA silicon and EDA tools providers. This guarantees that our innovative solutions take advantage of the latest silicon architecture and tools methodology advances.

Strategic Client Partnerships
With our strategic clients we adopt a full-disclosure approach allowing Aliathon to fully understand the technical and commercial challenges our customers face. Our unique solutions are designs to help our clients meet their projects critical success factors ensuring a win-win scenario for both parties.

What we do

Aliathon’s market solutions are built on a foundation of highly efficient, functionally balanced VHDL IP blocks. Our cores are designed to comply with the relevant telecom (ITU) standards and have been used in 100’s of designs shipping in 100,000’s of clients products to date.

These blocks are designed to seamlessly interact and form complex data paths to solve our clients unique requirements. For more details of the markets we target / address follow the link to our markets section.

While we recommend that our clients engage with Aliathon at system level and collaborate with our team to deliver a complete solution, in some cases our cores can also be taken individually and integrated in to your own design.

Our integrated solutions & lower level building blocks are divided in to their relevant technology areas and can be viewed by clicking the links below;

Optical Transport Network

SONET / SDH